1. Field of the Invention
The present invention relates to a method of fabricating a liquid crystal display (LCD) device, and more particularly, to a method of fabricating an LCD device capable of exposing a non-exposure region.
2. Description of the Related Art
Recently, LCD devices using a thin film transistor as a switching device have been widely utilized as image displaying devices. These LCD devices can be installed in various display devices such as a notebook, a personal digital assistant, a TV, etc. In order to increase productivity of LCD devices, manufacturers generally form a large number of unit LCD panels on a large mother substrate. However, the trend for these devices is to become larger, which decreases the number that can be formed on a substrate.
The process of forming a plurality of LCD panels on the mother substrate will be explained in brief. The method of fabricating the LCD device mainly includes the steps of forming a thin film transistor (TFT) array substrate having a switching device, forming a color filter substrate for displaying images in colors, bonding the TFT array substrate and the color filter substrate, and injecting liquid crystal between the two substrates.
The step of forming the TFT array substrate further includes the steps of preparing a mother substrate, defining a plurality of LCD panel regions on the mother substrate, forming a switching device on the LCD panel region, and forming an alignment layer on the mother substrate for the initial alignment of liquid crystal.
The step of forming the color filter substrate further includes the steps of preparing a mother substrate, defining a plurality of LCD panel regions on the mother substrate, forming a color filter layer on the LCD panel region, forming a common electrode on the color filter layer, and forming an alignment layer on the common electrode.
The step of forming a plurality of the LCD panels on the mother substrate will be explained in more detail with reference to FIG. 1. FIG. 1 is a plane view showing a substrate where a plurality of unit liquid crystal panel regions are formed according to the related art. As shown in FIG. 1, there are 16 unit LCD panel regions 102 formed on a mother substrate 101. After the LCD panel regions 102 are defined, a metal layer is deposited on the entire mother substrate 101 by a sputtering process in order to form a gate electrode. Then, a photoresist is applied on the metal layer and an exposure process is performed in order to pattern the metal layer to form the gate electrode. Since the mother substrate 101 is not entirely exposed to light by one time exposure process due to the size limitation of the mask and exposing device, the exposing process must be repeatedly performed.
FIG. 2 is a plane view showing a plurality of exposure regions formed on the substrate of FIG. 1. First, the mother substrate 101 is transferred onto a stage where an exposing device (not shown) is installed. Then, the exposing device detects an alignment key 201 formed at the edge of the mother substrate 101 to precisely arrange the mother substrate 101 onto the stage.
The alignment key 201 serves as a reference for arranging the unit LCD panels in order to efficiently utilize space when different LCD panels are simultaneously formed on the same mother substrate 101, and to apply the same mask at the time of performing the exposure process. In an exposure region 202 that can be exposed once by the exposure process, the LCD panel regions 102 are symmetrically arranged right and left on the basis of an exposure center line I. FIG. 2 illustrates that four LCD panel regions 102 are symmetrically arranged on the unit exposure region 202 based on the exposure center line I.
As shown in FIG. 2, if a size of the mother substrate 101 is not an integer times of a size of the unit LCD panel region 202, a non-exposure region 203 is formed at the center of the mother substrate 101 at the time of performing the exposure process since the unit LCD panel region 102 is arranged on the basis of the alignment key 201.
Since a photoresist applied to the non-exposure region 203 is not exposed, the photoresist is thicker than that in the LCD panel region 102 after a development process. Due to the photoresist pattern, it is difficult to determine an etching rate and to detect an end point of the etching. The non-exposure region 203 requires processing at the time of fabricating a color filter substrate, thereby causing a mis-alignment when the upper and lower substrates are bonded to each other.
The width of the photoresist pattern remaining at the non-exposure region 203 is much greater than that of the photoresist pattern at the LCD panel region 102, and therefore, it is very difficult to determine a proper etching time when a dry etch is performed. In addition, since a removing rate of the photoresist pattern of the LCD panel region 102 is different from that of the photoresist pattern of the non-exposure region 203 at the time of a stripping process of the photoresist pattern, the LCD panel region 102 may be damaged.
Also, a uniform etching rate is not determined due to the photoresist pattern of the non-exposure region 203 at the time of the dry etch. Thus, detecting the end point of the etching is difficult.
The inferiority generated at the time of exposing the TFT array substrate is also generated at the time of fabricating the color filter substrate. Specifically, the non-exposure region 203 is formed at the center of the mother substrate 101 if the unit LCD panel region 102 is defined on the mother substrate 101, then the color filter is deposited on the entire mother substrate 101 arranged on the basis of the alignment key 201, and the exposure process is performed.
Since a negative type photoresist is mainly used to form the color filter substrate, the photoresist is completely removed in the non-exposure region of the color filter substrate. Accordingly, a severe step is generated at the time of fabricating the color filter substrate, thus causing a cell gap inferiority at the time bonding the color filter substrate to the TFT array substrate.